The Popcorn Chip
A custom chip that counts 1s. Fully validated.
One die. A whole class.
The real die, under a microscope.
Lay the layout over it. Every block is a different student's design.
This one is mine.
Zoom in…
My placed & routed design, in full.
My design · placed & routed
We built it our way.
Drew our own standard cells for the basic gates.
Coded our own synthesis, place & route. Our own tool.
Wrote the Verilog and the test cases.
DRC and LVS clean. Off to the fab.
It's alive.
The chip counts the 1s. 01101000 → 3
Scroll to try all 256 inputs.
| In | In (bin) | Out | Out (bin) |
|---|
8-bit Popcount Chip
Count the 1s in an 8-bit word with a tree of adders. Click a bit to flip it.
Pure combinational popcount: 4 half-adder pairs, then two 2-bit adders, then one 3-bit adder. Stage delays are exaggerated so you can watch the sum travel.
Project information
- Course: ECE 6745 — Complex Digital ASIC Design
- Date: February 1 – March 1, 2026
- Node: TSMC 180nm
- Tools: Icarus Verilog, Ngspice, Klayout (DRC/LVS/RCX), Verilator, Custom Synthesis & PnR
- Presentation: Google Slides
The chip
Popcount shows up in machine learning, cryptography and networking.
How small?
1 µm × 1 µm. That is one millionth of a meter on each side. About 285 million would fit on a penny.
That is almost no room. We could not fit many cells or much functionality. But we did it, and our standard cells worked. A real VLSI feat.
Design flow
Status
Every possible input, tested on the real chip. Every one passed.